Table 1.
Operational specification of all the cells.
| Cell Feature | C6T [20] | S8T [21] | ST9T [22] | LP10T [23] | MET11T [24] | E2VR11T (Proposed) |
|---|---|---|---|---|---|---|
| Write operation | Differential | Differential | Differential | Differential | Differential | Differential |
| Read operation | Differential | Single end | Differential | Differential | Single end | Single end |
| Bit lines * | 2 BL/BLB |
3 BL/BLB/RBL | 1 BL |
2 WBL/RBL |
3 BL/BLB/RBL |
3 BL/BLB/RBL |
| Control signals * | 1 WL |
2 WL/RWL |
3 WL/WWLA/WWLB |
2 WWL/RWL/WWLA |
4 WWL/CWL/RWL/RGND |
2 WL/RWL |
| No. of NMOS Transistors in Read path | - | 2 | - | - | 2 | 3 |
* WL: word line; RWL: read word line; RBL: read bit line; WWL: write word line; CWL: column word line; RGND: read ground; BL, BLB: bit lines.