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. 2023 Jul 13;17:1203956. doi: 10.3389/fnins.2023.1203956

Figure 3.

Figure 3

Spike detector circuit shown in Figure 2. (A) Block diagram of the circuits with sample voltage output waveforms for each block. BUFF_1x comprises two inverters connected in series and BUFF_4x comprises four inverters with successively increasing width connected in series to drive the node Vpost_in. (B) Differentiator circuit (C) Comparator circuit.