Table 4.

Comparison of the ideal model simulation with on-chip performance.

Setups	$N_{aff\_active}$/$N_{aff}$	Additional noise and jitter	Success rate (25% pattern appearance rate)		Success rate (10% pattern appearance rate)
			Ideal Model	on-chip	Ideal model	on-chip
1	256/256	No	90%	96%	82%	90%
2	128/256	No	46%	80%	40%	(64%)*
3	256/256	Yes	64%	88%	60%	80%
4	128/256	Yes	8%	(26%)*	6%	(14%)*