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. 2023 Sep 14;14:5701. doi: 10.1038/s41467-023-41498-x

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© The Author(s) 2023

Open Access This article is licensed under a Creative Commons Attribution 4.0 International License, which permits use, sharing, adaptation, distribution and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons licence, and indicate if changes were made. The images or other third party material in this article are included in the article’s Creative Commons licence, unless indicated otherwise in a credit line to the material. If material is not included in the article’s Creative Commons licence and your intended use is not permitted by statutory regulation or exceeds the permitted use, you will need to obtain permission directly from the copyright holder. To view a copy of this licence, visit http://creativecommons.org/licenses/by/4.0/.

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Fig. 4 — a The microscopic image of the exposed PCB on the pinout side obtained after removing the insulating layer. b The en face image of the PCB on the pinout side obtained by robotic-OCT imaging before the removal process. c The scheme of data extraction from flash memory of a micro-SD card. d The distribution of vias appearing as white spots in the en face image of the region indicated by the red rectangle in (b), at a depth of ~66 μm below the surface of the insulating layer. D0, D1, D2, D3, D4, D5, D6, and D7 represent the data I/O signal pins, while address latch enable (ALE), chip enable (CE), command latch enable (CLE), read enable (RE) and write enable (WE) denote the command signal pins.