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. 2024 Jul 26;16(31):41211–41222. doi: 10.1021/acsami.4c05966

Figure 7.

Figure 7

Logical operations of different P3HT/PMMA PB-ESD synaptic dual-gate transistors under stimulation by VPG and VTG with (a) the same polarity and (b) opposite polarities. The drain voltage was maintained at −0.5 V.