Table 4.

Performance and design cost comparison of 1-to-4 DeMux.

Circuit	Cell	Areamul.	Delay	Sum_Ebath	CostAD		CostED		AOP	Crossover
	no.	μm2	clock cycle	10−2 eV	AD2	ratio	E2D2	ratio	10–1
[14]	198	0.2099	1.00	6.63	0.210	4.26	43.96	11.38	9.541	cell rotation
[16]	187	0.1439	1.75	4.06	0.441	8.94	50.48	13.07	9.521	clock phase
[18]	90	0.1055	1.00	4.02	0.105	2.14	16.16	4.19	9.543	cell rotation
[23]	140	0.3749	1.00	4.77	0.375	7.61	22.75	5.89	9.545	multi-layer
[17]	72	0.1818	0.75	2.76	0.102	2.07	4.28	1.11	9.546	multi-layer
Fig. 8	64	0.0876	0.75	2.62	0.049	1.00	3.86	1.00	9.555	multi-layer