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. 2024 Oct 30;24(21):6986. doi: 10.3390/s24216986

Table 3.

FPGA resource utilization for human localization accelerator on Zed board.

Module LUT BRAM DSP Slice
External modules and pose control unit 5246 14 22
Sleep posture PE 2714 06 08
Position binary classifier PE 1846 06 10
Adaptive sitting position PE 6330 18 18
Static and aliasing sitting position PE 4702 08 16
Execution modules, UART, and display 4342 6 08
Total 25180 58 82
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