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. 2024 Dec 5;26(12):1058. doi: 10.3390/e26121058

Figure 10.

Figure 10

Equivalence checking time using our TDD-based approach with the counting heuristic and the heuristics implemented in cotengra. The times (y-axis; log-scale) are shown for six different families of quantum circuits (different markers) and for varying numbers of qubits (x-axis). (a) Three families of quantum circuits: DJ, GHZ, GS; (b) Three families of quantum circuits: QFTE, RAR, WS.