Table 6.

Comparison of the mentioned references with the proposed D-flip-flop.

Refs.	Cell count	Area ()	Latency (clock cycles)	Set input	Reset input	Triggered
20	84	0.11	2.5	No	No	Rising
22	34	0.03	1	No	No	Rising
22	37	0.03	1	No	Yes	Rising
Proposed (Fig. 8)	28	0.02	0.5	No	Yes	Rising
23	79	0.09	2.5	Yes	Yes	Rising
10	53	0.04	2.25	Yes	Yes	Rising
Proposed (Fig. 9)	28	0.02	0.5	Yes	Yes	Rising