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. 2026 Feb 10;16:8065. doi: 10.1038/s41598-026-39813-9

Fig. 3.

Fig. 3

Integrated schematic of resistance network and current flow. (3A) Resistance Network Model, showing nodes representing low-resistance patches and resistive links forming a landscape circuit. (3B) Current Flow and Bottleneck Identification, illustrating current pathways and critical nodes where connectivity could be disrupted if removed. Concept and methodology adapted from McRae et al. (2008)46.