Figure 3.

Examples of evolved circuits resulting from a process of evolutionary optimization. In (a) a circuit obtained by conditional evolution is shown. All gates are identical (NAND gates). The first two nodes are the input units. The circuit outputs are located after nodes 11 and 12. This circuit has a very high fault tolerance value (ρ=0.944). In (b) we show a circuit obtained using a BFM. This circuit implements the same logic function as the circuit in (a) but involves a smaller fault tolerance of ρ=0.54.