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. Author manuscript; available in PMC: 2009 Jun 29.
Published in final edited form as: Proc SPIE Int Soc Opt Eng. 2008;6848:6481I. doi: 10.1901/jaba.2008.6848-6481I

Figure 3. TIMING.

Figure 3

Two time-voltage ramps are necessary for placing the acquisition window at anytime compare to the incoming signal. Ramp #1 is reset when the phase is detected and compare to a first reference timing. When ramp #1 passes the reference voltage, acquisition is started and ramp # 2 is reset. Finally ramp #2 is compared to a second reference voltage. Put together, these two ramps allow for defining an acquisition window of any length and at any time.