Skip to main content
. Author manuscript; available in PMC: 2010 May 12.
Published in final edited form as: Adv Mater. 2010 Feb 2;22(5):651–655. doi: 10.1002/adma.200902322

Figure 1.

Figure 1

Figure 1

Materials Selection and Device Configuration of Organic Thin Film Transistors. (a) The chemical structures of the semiconductor (DDFTTF), the dielectric (PVA), and the substrate (PLGA) are shown. (b) These materials are processed into devices in top-contact configuration as shown. Briefly, PLGA was melt-processed into substrates approximately 1 × 1 cm2 in area and 2 mm in thickness. Silver gate contacts were evaporated through a shadow mask. PVA dielectrics were spin coated from solution followed by thermal evaporation of DDFTTF semiconducting layers and gold source-drain contacts. The final device geometry contained channel lengths of 50 μm and a W/L ratio of 20.