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. Author manuscript; available in PMC: 2011 Oct 13.
Published in final edited form as: Nano Lett. 2010 Oct 13;10(10):3952–3956. doi: 10.1021/nl101724k

Table 1.

The critical device performance parameters of top-gated graphene transistors at Vds = 1V. The relevant data were extracted from a few representative literatures with the transconductance gm scaled to Vds= 1V assuming a linear Ids-Vds relation. The transit time is calculated using τt=gm/CTG. Since the channel length of our sub-100 nm device is less than the typical carrier mean free path in graphene (~ 1 micron),1,33 it is not straightforward to determine the carrier mobility values using a diffusive transport model. The mobility value cited for the device with self-aligned nanowire gate is based on our previous studies on longer channel devices using physically assembled oxide nanoribbons as the top-gate dielectrics, in which the carrier mobility >10,000 cm2/Vs are routinely achieved in top-gated grapheme transistors.14

Top-gate dielectric deposition approach Mobility
(cm2/Vs)
gm@Vds=1V
(mS/µm)
CTG
(nf/cm2)
Lgate
(nm)
τt=gm/CTG
@Vds=1V (ps)
ALD Al2O3 with NO2 functionalization7 400 0.025 556 360 80.1
ALD Al2O3 with Al buffer layer23 2700 0.275 400 350 5.09
ALD HfO2 with polymer buffer layer24 ~1500 0.14 194 240 3.39
Self-aligned nanowire top-gate >1000014 2.3 483 90 0.19