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. Author manuscript; available in PMC: 2011 Jan 1.
Published in final edited form as: Nanotechnology. 2009 Nov 30;21(1):015705. doi: 10.1088/0957-4484/21/1/015705

Figure 4.

Figure 4

(a) The schematics of the GNR FET device. (b) Ids−Vds curves of a GNR-FET on 72 nm Al2O3/Si substrate. (c) Ids−Vg curves of the GNR-FETs on the 72nm Al2O3/Si substrate and the 300 nm SiO2/Si substrate (inset).