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. Author manuscript; available in PMC: 2011 Oct 15.
Published in final edited form as: J Neurosci Methods. 2010 Jul 15;192(2):187–192. doi: 10.1016/j.jneumeth.2010.06.030

Figure 4.

Figure 4

A micrograph of the test circuit in silicon-on-sapphire technology. The fabricated die contained two channels and occupied just 3 × 3mm2. Each channel has series resistance, parasitic capacitance and leak compensation capability. After initial setup expenditures, each amplifier costs just a few dollars to manufacture.