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. Author manuscript; available in PMC: 2012 Feb 1.
Published in final edited form as: ACS Appl Mater Interfaces. 2011 Jan 18;3(2):261–270. doi: 10.1021/am1009056

Scheme 1.

Scheme 1

Schematic illustrations of the formation process of porous and non-porous silicon nanowire arrays through a two-step silver assisted etching method from the highly and lightly doped wafers respectively.