Figure 2.

Robust models for bistability and resettable bistability. (A) Identification of robust models in generating desired switching properties, at each combination of circuit design (C_n) and parameter set (P_n). Inset: constraints to identify switching properties. S, serum input; EE_ss, the steady-state level of EE. Red and green curves indicate EE_ss dose–responses simulated from initial conditions of quiescence and proliferation, respectively. See Materials and methods for details. (B) Matrix presentation of model robustness. Shown is the two-way clustering result of 768 gene circuits by 20 000 random parameter sets. Red and blue colors indicate positive and negative for bistability, respectively. (C) The most robust model for bistability, 2–3–5–6–7–9b. (D) Minimal models for bistability. (Left) Ranked distribution of the robustness of minimal models in generating bistability. (Right) The top 5 minimal models for bistability. The type of logic gate and the correspondingly regulated node are indicated under each circuit. See text for details. (E) Minimal models for resettable bistability. (Left) Ranked distribution of the robustness of minimal models in generating resettable bistability. (Right) The top 2 minimal models for resettable bistability. The type of logic gate, the type of involved positive feedback, and the correspondingly regulated node are indicated under each circuit. See text for details.