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. 2011 Feb 4;8(62):1281–1297. doi: 10.1098/rsif.2010.0729

Figure 5.

Figure 5.

A 74L85 standard 4-bit magnitude comparator (four layers deep) and its seesaw circuit simulation, with 1x = 50 nM. (a) The digital logic circuit diagram. The corresponding seesaw circuit has roughly 100 seesaw gates. (b) Seesaw circuit simulation with selected input vector of A greater than B. (c) Seesaw circuit simulation with selected input vector of A smaller than B. (d) Seesaw circuit simulation with selected input vector of A equal to B.