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. Author manuscript; available in PMC: 2012 Dec 1.
Published in final edited form as: Ultrasonics. 2011 May 27;51(8):953–959. doi: 10.1016/j.ultras.2011.05.010

Fig. 4.

Fig. 4

Block diagram of the tansmission beamformer. The delay values (<1.067 μs) and electronical scanning controls are stored in RAMs in FPGA.