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. 2011 May 4;11(5):4943–4971. doi: 10.3390/s110504943

Figure 3.

Figure 3.

Typical CMOS metallisation (simplified, and for brevity showing only single-layer metal). The thickness of the marked ‘stack’ is typically 1 μm and here comprises a titanium barrier layer, an alloy of Al-Si-Cu and a titanium nitride anti-reflective coating.