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. 2011 Jun 10;11(6):6257–6269. doi: 10.3390/s110606257

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© 2011 by the authors; licensee MDPI, Basel, Switzerland.

This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution license (http://creativecommons.org/licenses/by/3.0/).

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Figure 4. — (a) Front-side UMC 0.35 μm 1P4M standard CMOS process; (b) Back-side grinding and vent hole DRIE; (c) Back chamber DRIE; (d) Microphone sacrificial layer etching.

Figure 4. — (a) Front-side UMC 0.35 μm 1P4M standard CMOS process; (b) Back-side grinding and vent hole DRIE; (c) Back chamber DRIE; (d) Microphone sacrificial layer etching.