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. Author manuscript; available in PMC: 2012 Jan 1.
Published in final edited form as: IEEE Trans Circuits Syst I Regul Pap. 2011;58(8):1749–1760. doi: 10.1109/TCSI.2010.2103172

Fig. 6.

Fig. 6

Simulated waveforms and timing diagram showing the operation of the offset-control blocks in the high speed comparators.