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. Author manuscript; available in PMC: 2012 Oct 5.
Published in final edited form as: Nanoscale. 2011 Aug 25;3(10):4060–4068. doi: 10.1039/c1nr10668f

Fig. 9.

Fig. 9

(a) SEM image of a porous silicon nanowire device. The scale bar of inset is 100 nm. (b) Drain current versus drain voltage at variable gate voltage (Adapted from ref. 42. Copyright 2009 American Chemical Society.)