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. Author manuscript; available in PMC: 2013 Mar 15.
Published in final edited form as: J Neurosci Methods. 2011 Dec 9;204(2):296–305. doi: 10.1016/j.jneumeth.2011.11.027

Fig. 3.

Fig. 3

A) Schematic of a single amplifier circuit. B) Schematic of the protection circuit C) Picture of the final assembled system. Onboard low noise power supply delivered power with a noise of 136μV P-P under load, total input referred noise of amplifier and array system was measured to be 56μV RMS