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. 2009 Jul 27;9(8):5933–5951. doi: 10.3390/s90805933

Table 3.

Comparison.

Reference Our chip [13] [25] [26] [27]
Photosensors Yes No Yes Yes Yes
Technology 0.18 μm 1P6M FPGA 0.35 μm 1P5M 0.25 μm 0.6 μm 2P3M
PE area (μm2) 23 × 29 68 LE* 75.5 × 73.3 83 × 45 20 × 20
Stored bits per PE 8 N/A 32 4 N/A
PE Array 32 × 32 12 × 12 128 × 128 9 × 9 512 × 512
Image processing 6-Bit Gray 9-Bit Gray 8-Bit Gray 4-Bit Gray Analog
Control Style SIMD Regular SIMD/CNN Complicated Regular
Global features Specific periphery N/A Non-specific Periphery No exportation Specific periphery
Programmability High Specific High Moderate Low
*

the chip was implemented in FPGA, therefore the area account by LE is given.