Skip to main content
. 2012 Jul 17;6:90. doi: 10.3389/fnins.2012.00090

Table 6.

Applied hardware parameters.

Parameter Description Value
Vclrc Amount of charge that will be accumulated on the capacitor C1 (Schemmel et al., 2006) in case of causal spike time correlations, corresponds to xt) 0.90 V
Vclra See Vclrc, but for the anti-causal circuit 0.94 V
Vctlow Lower spike pair accumulation threshold 0.85 V
Vcthigh Higher spike pair accumulation threshold 1.0 V
Adjdel Adjustable delay between the pre- and postsynaptic spike 2.5 μA
Vm Parameter to stretch the STDP time constant τSTDP 0.0 V
Ibcorreadb Bias current that influences timing issues during read outs 2.0 μA
drvIrise Rise time of synaptic conductance 1.0 V
drvIfall Fall time of synaptic conductance 1.0 V
Vstart Start value of synaptic conductance, need for small rise times 0.25 V
drvIout Maximum value of synaptic conductance, corresponds to gmax Variable

The difference Vcthigh − Vctlow corresponds to the threshold ath. All data is recorded with the FACETS chip-based hardware system using chip number 444 and synapse column 4.