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. 2012 Oct 18;2:754. doi: 10.1038/srep00754

Figure 4. Temperature effects on FET characteristics.

Figure 4

(a) Plot of source-drain current (IDS) as a function of gate voltage (VG) at various temperatures (77 K to 373 K) with source-drain voltage VDS = −40 V (inset is plot of square root of IDS as a function of VG at different temperatures and VDS = −40 V). (b) Temperature dependence of electron and hole mobilities in vacuum (inset is the temperature dependence of threshold voltage, VT). The lowest electron and hole mobilities at 77 K are respectively 0.011 cm2 V−1 s−1 and 0.096 cm2 V−1 s−1 while the highest electron and hole mobility at 373 K are respectively 1.58 cm2 V−1 s−1 and 13.41 cm2 V−1 s−1 (W/L = 1400 μm/50 μm).