Table 2.
FPGA resources measured with a Quartus tool [19] with a window size of 32 pixels. Case “h” (high quality acceleration). Processors “e” and “s” and “f” mean NIOS II/ “economic”, “standard”, and “fast”.
| Processor/Quality | Method | Logic Cells | Method | Logic Cells | Method | Logic Cells | (FST,TSST,2DLOG) | |
|---|---|---|---|---|---|---|---|---|
|
| ||||||||
| EMs (9 × 9) | Total memory bits | |||||||
|
|
|
|
|
|||||
| e/h | FST | 11,637 (35%) |
TSST | 13,173 (40%) |
2DLOG | 13,056 (39%) |
23 (33%) |
44,032 (9%) |
| s/h | 12,382 (37%) |
14,023 (42%) |
13,955 (42%) |
27 (39%) |
79,488 (16%) |
|||
| f/h | 13,090 (39%) |
14,755 (44%) |
14,678 (44%) |
27 (39%) |
114,944 (24%) |
|||