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. Author manuscript; available in PMC: 2014 Apr 1.
Published in final edited form as: J Neural Eng. 2013 Feb 21;10(2):026010. doi: 10.1088/1741-2560/10/2/026010

Figure 4.

Figure 4

Electronic schematics of neural interface, amplification circuitry, and telemetry unit. (a) Block diagram of the implantable module, including AB and TxB. The TxB (above the dotted line) receives a TTL input from the AB (below the dotted line) that modulates a freely running commercial VCO. (b) The circuit block diagram of the 100-ch CMOS preamplifier ASIC is shown. The preamplifier uses a capacitive-feedback, folded cascode operational transconductance amplifier (OTA) configuration with a source follower output buffer. (c) The RF superheterodyne receiver (Rx) is shown using a polarized antenna to reduce the sensitivity to movement of the transmitter antenna.