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. 2013 Aug 23;13(9):11314–11335. doi: 10.3390/s130911314

Table 1.

Pseudo-code of PVVE algorithm (digital section only).

Pseudo-code # of clock cycles
Loop starts
Load x[n] to register M
Load y[n − 1] to register M
Register multiplication to perform (1 − β)x[n] N
Register multiplication to perform βy[n − 1] N
Register addition to perform y[n] = (1 − β)x[n] + βy[n − 1] 1
Store y[n] to memory M
Register subtraction to perform z[n] = x[n] − y[n] 1
Store z[n] to memory M
Change n value 1
Loop ends