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. Author manuscript; available in PMC: 2014 Aug 7.
Published in final edited form as: Phys Med Biol. 2013 Jul 8;58(15):10.1088/0031-9155/58/15/5049. doi: 10.1088/0031-9155/58/15/5049

Figure 3.

Figure 3

Block diagram of a multiplexed PWM scheme. Under the proposed scheme 64 position channels will be multiplexed into 8 PWM generators, then further multiplexed into just 4 readout lines to a back-end FPGA