Table 8.

The estimated power consumption of the proposed GHA and FCM circuits implemented by field programmable gate array (FPGA) at different clock rates.

Clock Rate	1 MHz	10 MHz	50 MHz	200 MHz	400 MHz	800 MHz	1 GHz
Est.Power (mW)	91.75	106.71	179.06	429.36	805.70	2,985.00	5,834.34
Channels per Second	0.5	5.0	25.1	100.3	201.1	401.6	502.5