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. Author manuscript; available in PMC: 2013 Dec 31.
Published in final edited form as: Proc SPIE Int Soc Opt Eng. 2011 Feb 28;7905:10.1117/12.874238. doi: 10.1117/12.874238

Figure 3.

Figure 3

32 × 32 pixel Single Photon Avalanche Diodes array. The inset shows a schematic of the pixel comprehensive of a 20 μm-diameter SPAD, a Variable-Load Quenching Circuit [8], an 8 bit counter and a latch memory.