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. Author manuscript; available in PMC: 2014 Jan 27.
Published in final edited form as: Conf Proc IEEE Eng Med Biol Soc. 2011;2011:3024–3030. doi: 10.1109/IEMBS.2011.6090828

Fig. 7.

Fig. 7

Data flow and detailed diagram of internal architecture of the Brain Phone hardware. Specifically, the digital signal processor handles the filtering, spike detection and sorting, slow potential changes, and decoding algorithms which the supervisory processor handles the oversight of the system. Data is converted into SNIF (Standard Neural Interface Format) files to allow ease of data flow and probing (sniffing) of data throughout the function of the system. Prosthetic-specific vector space conversion will be uploaded to the Versatile Interface for Prosthetic Control unit diagramed above.