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. Author manuscript; available in PMC: 2014 Mar 12.
Published in final edited form as: IEEE Trans Circuits Syst II Express Briefs. 2012:286–288. doi: 10.1109/ISSCC.2012.6177017

Fig. 6.

Fig. 6

Fabricated chip micrograph of the VD/REC in the ON Semiconductor 0.5-µm standard CMOS process, occupying an area of 0.585 mm2.