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. Author manuscript; available in PMC: 2014 Sep 1.
Published in final edited form as: IEEE J Solid-State Circuits. 2013 Sep;48(9):2203–2216. doi: 10.1109/JSSC.2013.2266862

Fig. 16.

Fig. 16

(a) Adaptive VREC and fixed VDD vs. ISTIM, (b) stimulation power efficiencies vs. ISTIM, and (c) overall power efficiencies, i.e., rectifier + stimulator, vs. ISTIM. Solid line: adaptive supply control, dashed line: fixed supply, electrode-tissue model: RS = 2 kΩ and CDL = 500 nF in series, and TS = 400 μs.