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. Author manuscript; available in PMC: 2014 Sep 1.
Published in final edited form as: IEEE J Solid-State Circuits. 2013 Sep;48(9):2203–2216. doi: 10.1109/JSSC.2013.2266862

TABLE III.

Wireless Stimulating System Specifications.

Overall System Current Stimulator
Process 0.5 μm CMOS # output ch. 4-ch (DBS)
ASIC area 2.25 mm2 Stim. rate 15.6 ~ 500 Hz*
Power source Inductive link Pulse width 16 ~ 512 μs*
Power Management Current range 0.08 ~ 2.48mA (5b)
Adjustable Vrec 2.5 ~ 4.6V (3b) INL / DNL 0.43 / 0.17 LSB
Measured PCE 72 ~ 87% Ch. max. ΔI 4 μA
Vdig 1.8 V IStatic 14 μ**
OVP threshold VIN,peak > 5.8V VHead 150 mV
Back telemetry short-coil LSK Charge balan. Active pulse inject.
Forward Telemetry Stim. PCE 58 ~ 68%***
Clock freq. 2 MHz Voltage Readout Channel
ASK data rate 50 kbps In/out range 0 ~ 4.6 V/0.2 ~ 1.6 V
Modul. index 5.8% IStatic 12 μA**
*

Adjustable in MCU

**

Simulation

***

Vary with load model and pulse width