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. 2014 Nov 13;5:2113–2121. doi: 10.3762/bjnano.5.220

Figure 3.

Figure 3

ID–VG curve of (a) bare SWCNT FET and (b) (GA)22-decorated SWCNT FET exposed to DA, UA and a DA–UA solution mixture. The arrows indicate the direction of the gate voltage sweep.