Table 2.
Synthesis performance comparison between families of FPGA-based accelerators and ours.
|
|
Our architecture | Families of FPGA-based accelerators | |||
|---|---|---|---|---|---|
| FPGA | XC5VLX110T | XC2VP70 | XC4VLX160 | XC2VP70 | XC4VLX160 |
| Array size | 2048 | 1024 | 3072 | 1024 | 3072 |
| Slice (%) | 55 | 58 | 69 | 60 | 71 |
| Memory (%) | 20.3 | 10.1 | 33.5 | 11 | 38 |
| Clock (MHz) | 136 | 125 | 166 | 140 | 189 |