Figure 3. Fabrication of few-layer MoS₂ transistors.

(a) Cross-sectional schematic of a back-gated MoS₂ transistor treated with remote O₂ plasma. (b) AFM image of a few- layer MoS₂ flake on a 300-nm SiO₂ substrate. The inset shows the cross-sectional plot along the white line in (b). (c) Optical image of the device using the flake in (b) as the channel. The substrate acts as a back gate. The channel length and width of the device are 1 and 4.2 μm, respectively.