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. 2015 Jul 8;5:12014. doi: 10.1038/srep12014

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(a) Schematic structure of the intrinsic p-type graphene FET device; (b) Substrate gating effect of the electron irradiation and charge distribution in the graphene FET on Si/SiO₂ substrate; (c) Band diagram of Si/SiO₂ interface, holes are trapped in the interface; (d) I_d-V_d curve in the dark (black square) and under 633 nm laser illumination (red dot).