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. 2015 Sep 28;5:14459. doi: 10.1038/srep14459

Figure 6. Monte Carlo simulations of 1-bit adder circuit.

Figure 6

(a) Results of Monte Carlo simulations on the 1-bit adder circuit with input signal and (b) truth table using the extracted electrical parameters from R2R gravure-printed SWNT-TFTs with channel lengths of 130 μm (c,d) and 180 μm (e,f).