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. 2015 Oct 2;9:357. doi: 10.3389/fnins.2015.00357

Figure 4.

Figure 4

(A) Micrograph of the multi-purpose neuromorphic chip die showing the neuron tile array and the bias generator. (B) Illustration of the hardware setup used to obtain measurements for this paper. The pre-synaptic terminal of one neuron tile is connected to the post-synaptic terminal of another neuron tile through an off-chip TiO2−x memristor. A PC controls the digital settings of the on-chip bias generator.