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. 2016 Mar 28;113(15):3986–3990. doi: 10.1073/pnas.1520810113

Fig. 2.

Fig. 2.

(A) Device structure and photograph of the EDLT using the thin insulating FeSe layer as a channel. (B) Transfer characteristics (drain current ID versus gate bias VG) of the FeSe EDLT under VD = +0.5 V at T = 220 K cyclically measured for two loops. The arrows indicate the VG-sweep directions starting from VG = 0 V. (Bottom) The leakage current (IG) versus VG is also shown.