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. 2016 Mar 28;113(15):3986–3990. doi: 10.1073/pnas.1520810113

Fig. S7.

Fig. S7.

Electronic phase diagrams of the FeSe EDLT. (Left) Tc vs. VG and (Right) Tc vs. RH at 40 K. Circles and squares show onset Tc (Tconset) and zero resistivity temperature (Tczero), respectively. For a phase diagram (Tc vs. estimated sheet carrier density), see Fig. 4 in the main text.