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. 1992 Nov-Dec;97(6):635–672. doi: 10.6028/jres.097.030

Fig. 25.

Fig. 25

Pulse timing diagram that applies to a calibration of the gated integrator. The output of the integrator should ideally be a pulse with an amplitude directly proportional to the sum of the amplitudes of the cahbration pulses that occur during the gate pulse.