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. Author manuscript; available in PMC: 2017 Feb 16.
Published in final edited form as: Nano Lett. 2016 Jun 27;16(7):4483–4489. doi: 10.1021/acs.nanolett.6b01661

Figure 1.

Figure 1

Small-diameter nanopores and amplifier design. (a) Typical input-referred current noise spectrum for a nanopore measurement. The axes are plotted in log-log scale. Low frequency noise is primarily governed by flicker and thermal contributions whereas high frequency noise is dominated by the voltage noise of the amplifier interacting with the capacitance at the amplifier’s input. (b) Schematic of the cross-section of the nanopore chip including the silicone passivation on the top. (c) Bright-field TEM image of nanopores made in STEM-thinned membranes.29 Circles indicating diameters of 1.7 nm, 2.0 nm, and 2.6 nm are shown in overlay with corresponding nanopores. (d) Simplified electrical schematic illustrating the various capacitances and noise sources that determine high-frequency noise behavior. Input current signals are converted to a voltage with a gain set by RF. The net capacitance that determines the noise is Camp + Cpore. (e) Die micrograph of the 5 mm × 5 mm amplifier chip with a zoomed-in micrograph of a single channel. The chip has 25 amplifiers, each of which implement the schematic illustrated in (c) and which can be operated independently of each other. Each channel has an Al electrode that is converted to an Ag/AgCl electrode through postprocessing.