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. 2017 Jul 3;17(7):1552. doi: 10.3390/s17071552

Figure 8.

Figure 8

Left: Classification performance for the detection of the MRCP for CPU and FPGA for 32–124 channels. The median (BA˜) and mean (BA¯) classification performance is reported for each case. Right: Resource utilization of the DFHWA for different numbers of EEG channels. The percentage values refer to the amount of resources provided by the Zynq ZC7030.