Skip to main content
. 2017 Jul 3;17(7):1552. doi: 10.3390/s17071552
ASIC Application-Specific Integrated Circuit
BA Balanced Accuracy
BCI Brain-Computer Interface
BRAM Block Random Access Memory
CPU Central Processing Unit
DFHWA Dataflow Hardware Accelerator
DMA Direct Memory Access
DSP Digital Signal Processing
EMG Electromyography
EOG Electrooculography
ERD/ERS Event-Related Desynchronization/Synchronization
EEG Electroencephalography
ERP Event-Related Potential
FIFO First-In, First-Out
FIR Finite Impulse Response
FF Flip Flop
FNR False Negative Rate
FPGA Field Programmable Gate Array
FPR False Positive Rate
GPU Graphics Processing Unit
IIR Infinite Impulse Response
ISI Inter-Stimulus Interval
IRQ Interrupt ReQuest
LUT Look-Up Table
MAC Multiply ACcumulate
ML Machine Learning
MRCP Movement Related Cortical Potential
MRS Mobile CPU-based Reference System
PE Processing Element
PL Programmable Logic
PS Processing System
SDF Synchronous Dataflow
SoC System-on-Chip
SSVEP Steady-State Visual Evoked Potential
SNR Signal-to-Noise Ratio
SVM Support Vector Machine
SRS Standard-PC Reference System
TPR True Positive Rate
TNR True Negative Rate